Monogate

Research operating system

Verified mathematics.
Verified software.
Verified hardware.

Build once. Prove once. Run everywhere.

Most systems stop at code. Monogate carries evidence — from mathematics, to software, to hardware.

1 Source EML
0 Targets C · Rust · GPU · FPGA · Lean …
Machine-checked every step

The pipeline

One source, carried to hardware — proven at every step.

  1. EMLone source
  2. Forgecompile
  3. Leanproof ✓
  4. MachLibmath
  5. RTLsynthesis
  6. FPGAon silicon ◦
  7. ESP32byte-identical ◦
  8. Evidencepacket · replay

Hover a stage to trace the flow. Lean is machine-checked proof (formal). FPGA / ESP32 are measured — byte-identical output on real silicon, not formal equivalence.

Four ways in

Where do you want to start?

Live from CI

The verification skyline

Numbers that can go down. Emitted by the build, not by marketing.

@verify obligations
0
Discharged
18.9%
Core sorries
0
Modules built
69 / 77
FPGA bitstreams
0

Live from status.json (machlib CI) — the real state, in progress. FPGA count from the hardware lane.

The evidence

See it. Don't take our word.

The same artifacts a reviewer would demand — cycling live.

Lean · @verify(pid_step_bounded)
theorem pid_step_bounded
    (error prev_error integral kp ki kd dt : ℝ)
    (h : dt > 0) :
    OUT_MIN ≤ pid_step error prev_error integral kp ki kd dt ∧
    pid_step error prev_error integral kp ki kd dt ≤ OUT_MAX := by
  unfold pid_step
  exact ⟨clamp_ge_lower _ _ _, clamp_le_upper _ _ _⟩
✓ no sorry · axioms: MachLib.Real base
EML · the one source (control.eml)
fn pid_step(error, prev_error, integral,
            kp, ki, kd, dt: Real) -> Real
  where   chain_order <= 0
  requires (dt > 0.0)
  ensures  (result >= OUT_MIN)
  ensures  (result <= OUT_MAX)
{
  clamp((kp*error) + (ki*integral)
      + (kd*(error - prev_error))/dt, OUT_MIN, OUT_MAX)
}
FPGA · captured control waveform
Replay · boundary-event timeline
Proof graph · obligation routing

Auditable by design

Every number here can go down. We publish what we retract.

Evidence & claims ledger